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ciao stm

pull/1/head
Rafael Zurita 6 years ago
parent
c828afc897
commit
dd69951166
24 changed files with 0 additions and 1441 deletions
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  1. 189
      compile/original/Makefile.orig
  2. 1
      compile/original/flash.sh
  3. 135
      compile/original/ld.script
  4. 135
      compile/original/ld.script.avr
  5. 105
      compile/original/ld.script.avr.baremetal
  6. 149
      compile/original/ld.script.avr2
  7. 55
      compile/original/ld.script.stm32
  8. 106
      config/Configuration.orig
  9. 64
      device/movidos/gpio/gpiocontrol.c
  10. 85
      device/movidos/gpio/gpiohandler.c
  11. 42
      device/movidos/gpio/gpioinit.c
  12. 27
      device/movidos/gpio/gpioread.c
  13. 25
      device/movidos/gpio/gpioselect.c
  14. 31
      device/movidos/gpio/gpiowrite.c
  15. 14
      device/movidos/ram/ramclose.c
  16. 19
      device/movidos/ram/raminit.c
  17. 19
      device/movidos/ram/ramopen.c
  18. 21
      device/movidos/ram/ramread.c
  19. 21
      device/movidos/ram/ramwrite.c
  20. 19
      device/spi/spicontrol.c
  21. 36
      device/spi/spiinit.c
  22. 21
      device/spi/spiputc.c
  23. 82
      include/clk.h
  24. 40
      lib/userland.c.orig

189
compile/original/Makefile.orig
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#########################################################################
# #
# #
# Makefile for STM32 version of the Xinu operating system #
# #
# includes: .deps and .defs #
# #
# #
#########################################################################
COMPILER_ROOT = avr-
PNAME = ATMEGA328P
PLAT = Platform_$(PNAME)
TOPDIR = ..
CC = ${COMPILER_ROOT}gcc
LD = ${COMPILER_ROOT}gcc
OBJCOPY = ${COMPILER_ROOT}objcopy
OBJDUMP = ${COMPILER_ROOT}objdump
QEMU = /home/lechnerm/rafa/xinu/qemu_stm32/arm-softmmu/qemu-system-arm
XINU = $(TOPDIR)/compile/xinu.elf
XINUBIN = $(TOPDIR)/compile/xinu.bin
XINUBOOT = $(TOPDIR)/compile/xinu
BUILDMAKE = $(TOPDIR)/compile/bin/build-make
MKVERS = $(TOPDIR)/compile/bin/mkvers
MAKEDEP = $(CC) -M -MG
DEPSFILE = .deps
DEFSFILE = .defs
VERSIONFILE = version
# RAFA LDSCRIPT = ld.script
MKVERS = $(TOPDIR)/compile/bin/mkvers
REBUILDFLAGS = -s $(TOPDIR)/system debug.c \
-s $(TOPDIR)/lib \
-s $(TOPDIR)/device/tty \
-s $(TOPDIR)/device/nam \
# RAFA -s $(TOPDIR)/device/ram \
-s $(TOPDIR)/device/gpio \
-s $(TOPDIR)/device/spi \
#
-s $(TOPDIR)/shell 'xsh_rdstest*'
INCLUDE = -I$(TOPDIR)/include
DEFS = -DBSDURG -DVERSION=\""`cat $(VERSIONFILE)`"\"
# Compiler flags
# CFLAGS = -mcpu=cortex-m3 -mno-unaligned-access -mthumb -fno-builtin -fno-stack-protector -nostdlib -c -Wall -O ${DEFS} ${INCLUDE}
CFLAGS = -DF_CPU=16000000UL -mmcu=atmega328p -mrelax -fno-builtin -fno-stack-protector -nostdlib -c -Wall -Os ${DEFS} ${INCLUDE}
SFLAGS = ${INCLUDE}
# Loader flags
# RAFA LDFLAGS = -dn -m armelf -Map xinu.map -T ld.script
LDFLAGS = -Wl,--wrap,malloc,--wrap,free,--wrap,realloc,--wrap,fdevopen
all: xinu
#--------------------------------------------------------------------------------
# Handle generation of a new version string when initialize is recompiled
#--------------------------------------------------------------------------------
newversion:
@echo creating new version
@$(MKVERS) $(PNAME) > version
#--------------------------------------------------------------------------------
# Include generic make targets and rules from the file generated by build-make
#--------------------------------------------------------------------------------
-include $(DEFSFILE)
#--------------------------------------------------------------------------------
# Add files that require special rules and place start.o at the front
#--------------------------------------------------------------------------------
# RAFA quitamos el start.S y start.o porque intentaremos el startup de avr
# RAFA LD_LIST = binaries/start.o $(filter-out binaries/start.o,$(OBJ_FILES))
LD_LIST = $(filter-out binaries/start.o,$(OBJ_FILES))
#------------------------------------------------------------
# Rules for files that need special handling
#------------------------------------------------------------
# Define variables for the Configuration file and generated files
CONFFILE = $(TOPDIR)/config/Configuration
CONFH = $(TOPDIR)/include/conf.h
CONFC = $(TOPDIR)/system/conf.c
# Define variables for the config program and its sources
CONFPGM = $(TOPDIR)/config/config
CONFL = $(TOPDIR)/config/config.l
CONFY = $(TOPDIR)/config/config.y
# Set up the required build directory structure
BLDDIRS = binaries
export
#--------------------------------------------------------------------------------
# Specific additional rules and exceptions
#--------------------------------------------------------------------------------
xinu: Makefile rebuild $(BLDDIRS) $(DEFSFILE) $(DEPSFILE) $(CONFH) $(CONFC) $(LD_LIST)
@echo;echo 'Loading object files to produce xinu'
# RAFA original : @$(LD) $(LDFLAGS) $(LD_LIST) -o $(XINU) -L/usr/lib/gcc/arm-none-eabi/6.3.1/ --print-memory-usage
@$(LD) $(LDFLAGS) -T ld.script $(LD_LIST) -o $(XINU)
@echo "Creating Binary..."
@$(OBJCOPY) -O binary $(XINU) $(XINUBIN)
examine-all:
$(OBJDUMP) -D $(XINU) | less
examine-header:
$(OBJDUMP) -x $(XINU) | less
flash:
stm32flash -w $(XINUBIN) -v /dev/ttyUSB0
qemu:
$(QEMU) -serial stdio -M stm32-f103c8 -kernel $(XINUBIN)
monitor:
$(QEMU) -monitor stdio -serial stdio -M stm32-f103c8 -kernel $(XINUBIN)
$(BLDDIRS):
@mkdir -p $(BLDDIRS)
objects: $(LD_LIST)
$(CONFH): $(CONFFILE) $(CONFPGM)
@echo making $(CONFH)
@make configure
$(CONFC): $(CONFFILE) $(CONFPGM)
@echo making $(CONFC)
@make configure
$(CONFPGM): $(CONFL) $(CONFY)
@echo making the config program
@make -C $(TOPDIR)/config clean all install
configure:
@echo forcing a rebuild of conf.h and conf.c
@make newversion
@(cd $(TOPDIR)/config; make install)
clean:
@echo removing .o files
@rm -f ${LD_LIST}
@echo removing configuration files ...
@rm -f $(CONFH) $(CONFC)
@(cd $(TOPDIR)/config; make clean)
@echo removing xinu ...
@rm -f $(XINU)
@rm -f $(XINUBIN)
@rm -f $(XINUBOOT)
#--------------------------------------------------------------------------------
# Locations of source directories and exceptions (.c and .[sS] files to exclude)
#--------------------------------------------------------------------------------
$(DEFSFILE):
@rm -f $(DEFSFILE)
@echo "" > $(DEFSFILE)
@make rebuild
$(DEPSFILE):
@rm -f $(DEPSFILE)
@echo "" > $(DEPSFILE)
@make depend
rebuild: $(CONFC)
@echo Rebuilding the $(DEFSFILE) file
@$(BUILDMAKE) $(REBUILDFLAGS) > $(DEFSFILE)
defclean:
rm -f $(DEFSFILE)
echo "" > $(DEFSFILE)
depend: $(DEFSFILE)
@echo;echo Making all dependencies in $(DEPSFILE)
@$(MAKEDEP) ${INCLUDE} ${SRC_FULL} > $(DEPSFILE)
@echo;echo Finished making dependencies
depclean:
rm -f $(DEPSFILE)
echo "" > $(DEPSFILE)
-include $(DEPSFILE)

1
compile/original/flash.sh
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~/rafa/stm32flash/stm32flash -w xinu.bin -S 0x8000000 -v -g 0x8000000 -b 115200 /dev/ttyUSB0

135
compile/original/ld.script
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/* Linker script for ATMEL(R) AVR(R) ATmega328P. */
OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
OUTPUT_ARCH(avr:5)
/* The beginning and end of the program ROM area. */
/* Leave 4 bytes for the 32-bit checksum plus 0x10 extra bytes free. */
_rom_begin = 0x00000000;
_rom_end = 0x00007FEC;
/* The beginning and end (i.e., top) of the stack */
/* Set up a stack with a size of (1/2)K */
_stack_begin = 0x800500;
_stack_end = 0x8008FF; /* RAFA, en atmega328 el fin de la RAM */
/* The end of the 2K RAM stack */
__initial_stack_pointer = 0x8008FF;
MEMORY
{
ROM(rx) : ORIGIN = 0, LENGTH = 32K
RAM(rw!x) : ORIGIN = 0x800100, LENGTH = 2K
}
SECTIONS
{
. = 0x0;
. = ALIGN(2);
.text :
{
/* RAFA _*/
text = ABSOLUTE(.); /* text: beginning of text segment */
*(.vectors)
KEEP(*(.vectors))
/*Init sections were here*/
/* From this point on, we don't bother about wether the insns are
below or above the 16 bits boundary. */
*(.init0) /* Start here after reset. */
__ctors_end = .;
KEEP (*(.init0))
*(.init1)
KEEP (*(.init1))
*(.init2) /* Clear __zero_reg__, set up stack pointer. */
KEEP (*(.init2))
*(.init3)
KEEP (*(.init3))
*(.init4) /* Initialize data and BSS. */
KEEP (*(.init4))
*(.init5)
KEEP (*(.init5))
*(.init6) /* C++ constructors. */
KEEP (*(.init6))
*(.init7)
KEEP (*(.init7))
*(.init8)
KEEP (*(.init8))
*(.init9) /* Call main(). */
KEEP (*(.init9))
*(.def_isr)
KEEP(*(.def_isr))
*(.progmem*)
. = ALIGN(2);
*(.text)
. = ALIGN(2);
*(.text*)
. = ALIGN(2);
etext = ABSOLUTE(.) ; /* etext: end of text */
} > ROM
.text :
{
. = ALIGN(0x10);
} > ROM = 0xAAAA
.= 0x800100;
. = ALIGN(2);
/* The ROM-to-RAM initialized data section */
.data :
{
data = ABSOLUTE(.); /* data: beginning of data segment */
__data = ABSOLUTE(.); /* data: beginning of data segment */
_data_begin = .;
*(.data)
. = ALIGN(2);
KEEP (*(.data))
*(.data*)
. = ALIGN(2);
KEEP (*(.data*))
*(.rodata) /* Do *NOT* move this! Include .rodata here if gcc is used with -fdata-sections. */
. = ALIGN(2);
KEEP (*(.rodata))
*(.rodata*)
. = ALIGN(2);
KEEP (*(.rodata*))
__data_end = .;
__data_start = .;
__data_load_start = .;
__bss_start = .;
} > RAM AT > ROM
/* The uninitialized (zero-cleared) data section */
.bss :
{
__bss = ABSOLUTE(.); /* bss: beginning of bss segment */
*(.bss)
. = ALIGN(2);
KEEP (*(.bss))
*(.bss*)
. = ALIGN(2);
KEEP (*(.bss*))
__bss_end = ABSOLUTE(.); /* _end: end of image */
} > RAM
_rom_data_begin = LOADADDR(.data);
__data_load = LOADADDR(.data);
}

135
compile/original/ld.script.avr
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@ -1,135 +0,0 @@
/* Linker script for ATMEL(R) AVR(R) ATmega328P. */
OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
OUTPUT_ARCH(avr:5)
/* The beginning and end of the program ROM area. */
/* Leave 4 bytes for the 32-bit checksum plus 0x10 extra bytes free. */
_rom_begin = 0x00000000;
_rom_end = 0x00007FEC;
/* The beginning and end (i.e., top) of the stack */
/* Set up a stack with a size of (1/2)K */
_stack_begin = 0x800500;
_stack_end = 0x8008FF; /* RAFA, en atmega328 el fin de la RAM */
/* The end of the 2K RAM stack */
__initial_stack_pointer = 0x8008FF;
MEMORY
{
ROM(rx) : ORIGIN = 0, LENGTH = 32K
RAM(rw!x) : ORIGIN = 0x800100, LENGTH = 2K
}
SECTIONS
{
. = 0x0;
/* RAFA . = ALIGN(2); */
/* ISR vectors */
.isr_vector :
{
*(.isr_vector)
. = ALIGN(0x10);
KEEP(*(.isr_vector))
} > ROM = 0xAAAA
/* Startup code */
.startup :
{
*(.startup)
. = ALIGN(0x10);
KEEP(*(.startup))
} > ROM = 0xAAAA
/* Program code (text), read-only data and static ctors */
.text :
{
/* RAFA _*/
text = ABSOLUTE(.); /* text: beginning of text segment */
__muluhisi3 = .;
start = .;
__do_copy_data = .;
__do_clear_bss = .;
_/* _data_end = .; */
__data_load_start = .;
__bss_end = .;
__bss_start = .;
__data_start = .;
/* FIN DE RAFA */
_ctors_begin = .;
*(.ctors)
. = ALIGN(2);
KEEP (*(SORT(.ctors)))
_ctors_end = .;
*(.progmem*)
. = ALIGN(2);
*(.trampolines*)
. = ALIGN(2);
*(.text)
. = ALIGN(2);
*(.text*)
. = ALIGN(2);
etext = ABSOLUTE(.) ; /* etext: end of text */
} > ROM
.text :
{
. = ALIGN(0x10);
} > ROM = 0xAAAA
.= 0x800100;
. = ALIGN(2);
/* The ROM-to-RAM initialized data section */
.data :
{
data = ABSOLUTE(.); /* data: beginning of data segment */
_data_begin = .;
*(.data)
/* rafa . = ALIGN(2); */
. = ALIGN(1);
KEEP (*(.data))
*(.data*)
/* RAafa . = ALIGN(2); todos los demas tambien */
. = ALIGN(1);
KEEP (*(.data*))
*(.rodata) /* Do *NOT* move this! Include .rodata here if gcc is used with -fdata-sections. */
. = ALIGN(1);
KEEP (*(.rodata))
*(.rodata*)
. = ALIGN(1);
KEEP (*(.rodata*))
_data_end = .;
edata = ABSOLUTE(.) ; /* edata: end of data */
} > RAM AT > ROM
/* The uninitialized (zero-cleared) data section */
.bss :
{
bss = ABSOLUTE(.); /* bss: beginning of bss segment */
_bss_begin = .;
*(.bss)
. = ALIGN(1);
KEEP (*(.bss))
*(.bss*)
. = ALIGN(1);
KEEP (*(.bss*))
_bss_end = .;
ebss = ABSOLUTE(.) ; /* ebss: end of bss */
end = ABSOLUTE(.); /* end: end of image */
_end = ABSOLUTE(.); /* _end: end of image */
} > RAM
_rom_data_begin = LOADADDR(.data);
}

105
compile/original/ld.script.avr.baremetal
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/* Linker script for ATMEL(R) AVR(R) ATmega328P. */
OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
OUTPUT_ARCH(avr:5)
/* The beginning and end of the program ROM area. */
/* Leave 4 bytes for the 32-bit checksum plus 0x10 extra bytes free. */
_rom_begin = 0x00000000;
_rom_end = 0x00007FEC;
/* The beginning and end (i.e., top) of the stack */
/* Set up a stack with a size of (1/2)K */
_stack_begin = 0x800500;
_stack_end = 0x800800;
/* The end of the 2K RAM stack */
__initial_stack_pointer = 0x800800;
MEMORY
{
ROM(rx) : ORIGIN = 0, LENGTH = 32K - 0x14
RAM(rw!x) : ORIGIN = 0x800100, LENGTH = 0x0800
}
SECTIONS
{
. = 0x0;
. = ALIGN(2);
/* ISR vectors */
.isr_vector :
{
*(.isr_vector)
. = ALIGN(0x10);
KEEP(*(.isr_vector))
} > ROM = 0xAAAA
/* Startup code */
.startup :
{
*(.startup)
. = ALIGN(0x10);
KEEP(*(.startup))
} > ROM = 0xAAAA
/* Program code (text), read-only data and static ctors */
.text :
{
_ctors_begin = .;
*(.ctors)
. = ALIGN(2);
KEEP (*(SORT(.ctors)))
_ctors_end = .;
*(.progmem*)
. = ALIGN(2);
*(.trampolines*)
. = ALIGN(2);
*(.text)
. = ALIGN(2);
*(.text*)
. = ALIGN(2);
} > ROM
.text :
{
. = ALIGN(0x10);
} > ROM = 0xAAAA
.= 0x800100;
. = ALIGN(2);
/* The ROM-to-RAM initialized data section */
.data :
{
_data_begin = .;
*(.data)
. = ALIGN(2);
KEEP (*(.data))
*(.data*)
. = ALIGN(2);
KEEP (*(.data*))
*(.rodata) /* Do *NOT* move this! Include .rodata here if gcc is used with -fdata-sections. */
. = ALIGN(2);
KEEP (*(.rodata))
*(.rodata*)
. = ALIGN(2);
KEEP (*(.rodata*))
_data_end = .;
} > RAM AT > ROM
/* The uninitialized (zero-cleared) data section */
.bss :
{
_bss_begin = .;
*(.bss)
. = ALIGN(2);
KEEP (*(.bss))
*(.bss*)
. = ALIGN(2);
KEEP (*(.bss*))
_bss_end = .;
} > RAM
_rom_data_begin = LOADADDR(.data);
}

149
compile/original/ld.script.avr2
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/* Linker script for ATMEL(R) AVR(R) ATmega328P. */
OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
OUTPUT_ARCH(avr:5)
/* The beginning and end of the program ROM area. */
/* Leave 4 bytes for the 32-bit checksum plus 0x10 extra bytes free. */
_rom_begin = 0x00000000;
_rom_end = 0x00007FEC;
/* The beginning and end (i.e., top) of the stack */
/* Set up a stack with a size of (1/2)K */
_stack_begin = 0x800500;
_stack_end = 0x8008FF; /* RAFA, en atmega328 el fin de la RAM */
/* The end of the 2K RAM stack */
__initial_stack_pointer = 0x8008FF;
MEMORY
{
ROM(rx) : ORIGIN = 0, LENGTH = 32K
RAM(rw!x) : ORIGIN = 0x800100, LENGTH = 2K
}
SECTIONS
{
. = 0x0;
. = ALIGN(2);
.text :
{
/* RAFA _*/
text = ABSOLUTE(.); /* text: beginning of text segment */
*(.vectors)
KEEP(*(.vectors))
/*Init sections were here*/
/* From this point on, we don't bother about wether the insns are
below or above the 16 bits boundary. */
*(.init0) /* Start here after reset. */
KEEP (*(.init0))
*(.init1)
KEEP (*(.init1))
*(.init2) /* Clear __zero_reg__, set up stack pointer. */
KEEP (*(.init2))
*(.init3)
KEEP (*(.init3))
*(.init4) /* Initialize data and BSS. */
KEEP (*(.init4))
*(.init5)
KEEP (*(.init5))
*(.init6) /* C++ constructors. */
KEEP (*(.init6))
*(.init7)
KEEP (*(.init7))
*(.init8)
KEEP (*(.init8))
*(.init9) /* Call main(). */
KEEP (*(.init9))
*(.def_isr)
KEEP(*(.def_isr))
__muluhisi3 = .;
start = .;
__do_copy_data = .;
__do_clear_bss = .;
_/* _data_end = .; */
__data_load_start = .;
__bss_end = .;
__bss_start = .;
__data_start = .;
/* FIN DE RAFA */
_ctors_begin = .;
*(.ctors)
. = ALIGN(2);
KEEP (*(SORT(.ctors)))
_ctors_end = .;
*(.progmem*)
. = ALIGN(2);
*(.trampolines*)
. = ALIGN(2);
*(.text)
. = ALIGN(2);
*(.text*)
. = ALIGN(2);
etext = ABSOLUTE(.) ; /* etext: end of text */
} > ROM
.text :
{
. = ALIGN(0x10);
} > ROM = 0xAAAA
.= 0x800100;
. = ALIGN(2);
/* The ROM-to-RAM initialized data section */
.data :
{
data = ABSOLUTE(.); /* data: beginning of data segment */
_data_begin = .;
*(.data)
. = ALIGN(2);
KEEP (*(.data))
*(.data*)
. = ALIGN(2);
KEEP (*(.data*))
*(.rodata) /* Do *NOT* move this! Include .rodata here if gcc is used with -fdata-sections. */
. = ALIGN(2);
KEEP (*(.rodata))
*(.rodata*)
. = ALIGN(2);
KEEP (*(.rodata*))
_data_end = .;
__data_end = .;
edata = ABSOLUTE(.) ; /* edata: end of data */
} > RAM AT > ROM
/* The uninitialized (zero-cleared) data section */
.bss :
{
bss = ABSOLUTE(.); /* bss: beginning of bss segment */
_bss_begin = .;
*(.bss)
. = ALIGN(2);
KEEP (*(.bss))
*(.bss*)
. = ALIGN(2);
KEEP (*(.bss*))
_bss_end = .;
ebss = ABSOLUTE(.) ; /* ebss: end of bss */
end = ABSOLUTE(.); /* end: end of image */
_end = ABSOLUTE(.); /* _end: end of image */
} > RAM
_rom_data_begin = LOADADDR(.data);
}

55
compile/original/ld.script.stm32
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/* Xinu for STM32
*
* Original license applies
* Modifications for STM32 by Robin Krens
* Please see LICENSE and AUTHORS
*
* $LOG$
* 2019/11/11 - ROBIN KRENS
* Initial version
*
* $DESCRIPTION$
*
* */
/* OUTPUT_ARCH(arm) */
ENTRY(start)
physbase = 0x08000000;
MEMORY
{
/* FLASH (xr) : ORIGIN = 0x08000000, LENGTH = 512K */
FLASH (xr) : ORIGIN = 0x8000000, LENGTH = 128K
/* SRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K */
SRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
}
SECTIONS
{
. = 0x0; /* Image starts here */
.text : ALIGN(4) {
text = ABSOLUTE(.); /* text: beginning of text segment */
*(.text .text.*) /* asm text, then C text */
*(.rodata .rodata.*) /* asm and C read-only data */
etext = ABSOLUTE(.) ; /* etext: end of text */
}
. = 0x20000000;
.data : AT(etext)
{
data = ABSOLUTE(.); /* data: beginning of data segment */
*(.data .data.*)
edata = ABSOLUTE(.) ; /* edata: end of data */
}
.bss ALIGN(4) :
{
bss = ABSOLUTE(.); /* bss: beginning of bss segment */
*(.bss .bss.*)
*(COMMON) /* extra sections that are common */
ebss = ABSOLUTE(.) ; /* ebss: end of bss */
. = ALIGN(8); */
end = ABSOLUTE(.); /* end: end of image */
_end = ABSOLUTE(.); /* _end: end of image */
. = ALIGN(8);
}
}

106
config/Configuration.orig
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/************************************************************************/
/* */
/* Configuration - Xinu device configuration specification file */
/* */
/* This file becomes input to the config program, which generates */
/* conf.h and conf.c */
/* */
/* Entries for a device specify the functions that handle each of the */
/* high-level I/O operations as follows: */
/* */
/* -i init -o open -c close */
/* -r read -w write -s seek */
/* -g getc -p putc -n control */
/* -intr int_hndlr -csr csr -irq irq */
/* */
/************************************************************************/
/* Type Declarations for both real- and pseudo- device types */
/* type of a null device */
null:
on nothing
-i ionull -o ionull -c ionull
-r ionull -g ionull -p ionull
-w ionull -s ioerr
/* type of a gpio device */
gpio:
on standard_gpio
-i gpioinit -o ionull -c ionull
-r gpioread -g ionull -p ionull
-w gpiowrite -s ioerr -n gpiocontrol
-intr gpiohandler
/* type of a tty device */
tty:
on uart
-i ttyinit -o ionull -c ionull
-r ttyread -g ttygetc -p ttyputc
-w ttywrite -s ioerr -n ttycontrol
-intr ttyhandler
/* type of ram disk */
ram:
on mem
-i raminit -o ramopen -c ramclose
-r ramread -g ioerr -p ioerr
-w ramwrite -s ioerr -n ioerr
-intr ionull
/* type of namespace device */
nam:
on top
-i naminit -o namopen -c ioerr
-r ioerr -g ioerr -p ioerr
-w ioerr -s ioerr -n ioerr
-intr ioerr
spi:
on standard_spi
-i spiinit -o ioerr -c ioerr
-r ioerr -g ioerr -p spiputc
-w ioerr -s ioerr -n ioerr
-intr ioerr
%%
/* Actual device declarations that each give the name of a device that */
/* will be present in the system */
/* Define the console device to be a tty and specify CSR*/
CONSOLE is tty on uart csr 0x40013800 -irq 53
/* Define the console device to be a tty and specify CSR*/
GPIO0 is gpio on standard_gpio csr 0x40010800 -irq 99
/* Define the console device to be a tty and specify CSR*/
GPIO1 is gpio on standard_gpio csr 0x40010C00 -irq 99
/* Define the console device to be a tty and specify CSR*/
GPIO2 is gpio on standard_gpio csr 0x40011000 -irq 99
/* Define the console device to be a tty and specify CSR*/
GPIO3 is gpio on standard_gpio csr 0x40011400 -irq 99
/* Define a null device */
NULLDEV is null on nothing
/* Define a namespace device */
NAMESPACE is nam on top
/* Define a SPI device */
SPI1 is spi on standard_spi
/* Define a ram disk device */
RAM0 is ram on mem
%%
/* Configuration and Size Constants */
#define NPROC 10 /* number of user processes */
#define NSEM 10 /* number of semaphores */
#define IRQBASE 32 /* base ivec for IRQ0 */
#define IRQ_TIMER IRQ_HW5 /* timer IRQ is wired to hardware 5 */
#define IRQ_ATH_MISC IRQ_HW4 /* Misc. IRQ is wired to hardware 4 */
#define CLKFREQ 200000000 /* 200 MHz clock */
#define LF_DISK_DEV RAM0

64
device/movidos/gpio/gpiocontrol.c
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/* gpiocontrol.c - gpiocontrol */
#include <xinu.h>
#define OFFSETMODE(x) (x * 4)
#define OFFSETCFG(x) ((x * 4) + 2)
#define OFFSETMODE2(x) ((x - 8) * 4)
#define OFFSETCFG2(x) (((x - 8) * 4) + 2)
static int setmode(struct dentry * devptr, uint32 mode, uint32 pin)
{
struct gpio_csreg * csrptr;
csrptr = (struct gpio_csreg *)(devptr->dvcsr);
if (pin < 8) {
csrptr->crl &= ~(0x3 << OFFSETMODE(pin)); // clear
csrptr->crl |= (mode << OFFSETMODE(pin));
}
else {
csrptr->crh &= ~(0x3 << OFFSETMODE2(pin)); // clear
csrptr->crh |= (mode << OFFSETMODE2(pin));
}
return 0;
}
static int setcnf(struct dentry * devptr, uint32 mode, uint32 pin)
{
struct gpio_csreg * csrptr;
csrptr = (struct gpio_csreg *)(devptr->dvcsr);
if (pin < 8) {
csrptr->crl &= ~(0x3 << OFFSETCFG(pin)); // clear
csrptr->crl |= (mode << OFFSETCFG(pin));
}
else {
csrptr->crh &= ~(0x3 << OFFSETCFG2(pin)); // clear
csrptr->crh |= (mode << OFFSETCFG2(pin));
}
return 0;
}
/*------------------------------------------------------------------------
* gpiocontrol - Control a gpio device pin settings
*------------------------------------------------------------------------
*/
devcall gpiocontrol(struct dentry * devptr, int32 func, int32 mode, int32 pin) {
switch(func) {
case SETMODE:
setmode(devptr, mode, pin);
break;
case SETCFG:
setcnf(devptr, mode, pin);
break;
default:
break;
}
return OK;
}

85
device/movidos/gpio/gpiohandler.c
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/* gpiohandler.c - gpiohandler */
#include <xinu.h>
/*------------------------------------------------------------------------
* gpiohandler - Handle an interrupt for a gpio device
*------------------------------------------------------------------------
*/
void gpiohandler(
uint32 xnum /* IRQ number */
)
{
struct gpio_csreg *csrptr; /* GPIO CSR pointer */
gpiointhook gphookfn; /* The inerrupt function */
/* Clear all interrupts */
// if(xnum == GPIO0_INT_A) {
// csrptr = (struct gpio_csreg *)(GPIO0_BASE);
// gphookfn = gpiotab[0].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus0);
// csrptr->irqstatus0 = 0xFFFFFFFF;
// return;
// }
// if(xnum == GPIO0_INT_B) {
// csrptr = (struct gpio_csreg *)(GPIO0_BASE);
// gphookfn = gpiotab[0].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus1);
// csrptr->irqstatus1 = 0xFFFFFFFF;
// return;
// }
//
// if(xnum == GPIO1_INT_A) {
// csrptr = (struct gpio_csreg *)(GPIO1_BASE);
// gphookfn = gpiotab[1].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus0);
// csrptr->irqstatus0 = 0xFFFFFFFF;
// return;
// }
// if(xnum == GPIO1_INT_B) {
// csrptr = (struct gpio_csreg *)(GPIO1_BASE);
// gphookfn = gpiotab[1].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus1);
// csrptr->irqstatus1 = 0xFFFFFFFF;
// return;
// }
//
// if(xnum == GPIO2_INT_A) {
// csrptr = (struct gpio_csreg *)(GPIO2_BASE);
// gphookfn = gpiotab[2].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus0);
// csrptr->irqstatus0 = 0xFFFFFFFF;
// return;
// }
// if(xnum == GPIO2_INT_B) {
// csrptr = (struct gpio_csreg *)(GPIO2_BASE);
// gphookfn = gpiotab[2].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus1);
// csrptr->irqstatus1 = 0xFFFFFFFF;
// return;
// }
//
// if(xnum == GPIO3_INT_A) {
// csrptr = (struct gpio_csreg *)(GPIO3_BASE);
// gphookfn = gpiotab[3].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus0);
// csrptr->irqstatus0 = 0xFFFFFFFF;
// return;
// }
// if(xnum == GPIO3_INT_B) {
// csrptr = (struct gpio_csreg *)(GPIO3_BASE);
// gphookfn = gpiotab[3].gphookfn;
// if(gphookfn != NULL)
// gphookfn(xnum, csrptr->irqstatus1);
// csrptr->irqstatus1 = 0xFFFFFFFF;
// return;
// }
}

42
device/movidos/gpio/gpioinit.c
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/* gpioinit.c - gpioinit */
#include <xinu.h>
struct gpiocblk gpiotab[NGPIO];
/*------------------------------------------------------------------------
* gpioinit - Initialize settings for a gpio device
*------------------------------------------------------------------------
*/
devcall gpioinit(
struct dentry *devptr /* Entry in device switch table */
)
{
//struct gpio_csreg * csrptr;
struct clock_csreg * clockptr;
//struct gpiocblk * gpioptr;
//csrptr = (struct gpio_csreg *)(devptr->dvcsr);
clockptr = (struct clock_csreg *)CLOCK_BASE;
//gpioptr = &gpiotab[devptr->dvminor];
/* Enable clock on GPIO */
switch (devptr->dvminor) {
case 0:
clockptr->apb2enr |= (1 << IOPAEN);
break;
case 1:
clockptr->apb2enr |= (1 << IOPBEN);
break;
case 2:
clockptr->apb2enr |= (1 << IOPCEN);
break;
case 3:
clockptr->apb2enr |= (1 << IOPDEN);
break;
default:
kprintf("Failed to recognize GPIO device");
return SYSERR;
}
return OK;
}

27
device/movidos/gpio/gpioread.c
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/* gpioread.c - gpioread */
#include <xinu.h>
/*------------------------------------------------------------------------
* gpioread - Read aspecified set of GPIO pins
*------------------------------------------------------------------------
*/
devcall gpioread(
struct dentry *devptr, /* Entry in device switch table */
char *value, /* Pointer to a 32bit buffer */
int32 pinmask /* Pins from which to read */
)
{
// struct gpio_csreg *csrptr; /* Pointer to GPIO CSRs */
//
// /* Obtain the address of the CSR from the device switch table */
//
// csrptr = (struct gpio_csreg *)(devptr->dvcsr);
//
// /* Access the GPIO pins, use the mask to select a subset, and */
// /* store the result in the specified buffer */
//
// *((uint32 *)value) = csrptr->datain & pinmask;
return OK;
}

25
device/movidos/gpio/gpioselect.c
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/* gpioselect.h - pin multiplexing and control for the BBB ZCZ package */
#include <xinu.h>
/*------------------------------------------------------------------------
* gpioselect - Configure modes for GPIO pins
*------------------------------------------------------------------------
*/
devcall gpioselect(
uint32 pinreg, /* Pin to be affected */
uint32 pinmode, /* Multiplexed pin function */
uint32 pinsettings /* Settings for the pin */
)
{
// volatile uint32* confreg; /* Pin configuration register */
//
// /* Pick up the pin configuration register address */
//
// confreg = &(((uint32*)PINMUXBASE)[pinreg]);
//
// /* Apply the specified settings to the pin */
//
// *confreg = pinmode|pinsettings;
//
return OK;
}

31
device/movidos/gpio/gpiowrite.c
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/* gpiowrite.c - gpiowrite */
#include <xinu.h>
/*------------------------------------------------------------------------
* gpiowrite - Write value of gpio pins
*------------------------------------------------------------------------
*/
devcall gpiowrite(
struct dentry *devptr, /* Entry in device switch table */
char *value, /* Pointer to 32-bit buffer */
int32 pin /* Pins to be written written */
)
{
struct gpio_csreg * csrptr;
uint8 val;
csrptr = (struct gpio_csreg *)(devptr->dvcsr);
val = (uint8)value;
if (val == 0) {
csrptr->odr &= ~(1 << pin);
return 0;
}
else if (val == 1) {
csrptr->odr |= (1 << pin);
return 0;
}
return OK;
}

14
device/movidos/ram/ramclose.c
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/* ramclose.c - ramclose */
#include <xinu.h>
/*------------------------------------------------------------------------
* Ramclose - Close a ram disk
*------------------------------------------------------------------------
*/
devcall ramclose (
struct dentry *devptr /* Entry in device switch table */
)
{
return OK;
}

19
device/movidos/ram/raminit.c
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/* raminit.c - raminit */
#include <xinu.h>
#include <ramdisk.h>
struct ramdisk Ram;
/*------------------------------------------------------------------------
* raminit - Initialize the remote disk system device
*------------------------------------------------------------------------
*/
devcall raminit (
struct dentry *devptr /* Entry in device switch table */
)
{
memcpy(Ram.disk, "hopeless", 8);
memcpy( &Ram.disk[8], Ram.disk, RM_BLKSIZ * RM_BLKS - 8);
return OK;
}

19
device/movidos/ram/ramopen.c
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/* ramopen.c - ramopen */
#include <xinu.h>
/*------------------------------------------------------------------------
* ramopen - Open a ram disk
*------------------------------------------------------------------------
*/
devcall ramopen (
struct dentry *devptr, /* Entry in device switch table */
char *name, /* Unused for a ram disk */
char *mode /* Unused for a ram disk */
)
{
/* No action -- just return the device descriptor */
return devptr->dvnum;
}

21
device/movidos/ram/ramread.c
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/* ramread.c - ramread */
#include <xinu.h>
#include <ramdisk.h>
/*------------------------------------------------------------------------
* ramread - Read a block from a ram disk
*------------------------------------------------------------------------
*/
devcall ramread (
struct dentry *devptr, /* Entry in device switch table */
char *buff, /* Buffer to hold disk block */
int32 blk /* Block number of block to read*/
)
{
int32 bpos; /* Byte position of blk */
bpos = RM_BLKSIZ * blk;
memcpy(buff, &Ram.disk[bpos], RM_BLKSIZ);
return OK;
}

21
device/movidos/ram/ramwrite.c
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/* ramwrite.c - ramwrite */
#include <xinu.h>
#include <ramdisk.h>
/*------------------------------------------------------------------------
* ramwrite - Write a block to a ram disk
*------------------------------------------------------------------------
*/
devcall ramwrite (
struct dentry *devptr, /* Entry in device switch table */
char *buff, /* Buffer containing a block */
int32 blk /* Block number to write */
)
{
int32 bpos; /* Byte position of blk */
bpos = RM_BLKSIZ * blk;
memcpy(&Ram.disk[bpos], buff, RM_BLKSIZ);
return OK;
}

19
device/spi/spicontrol.c
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/* spicontrol.c - spicontrol */
#include <xinu.h>
/*------------------------------------------------------------------------
* spicontrol - Control function for SPI device
*------------------------------------------------------------------------
*/
devcall spicontrol (
struct dentry *devptr, /* Entry in device switch table */
int32 func, /* Control function */
int32 arg1, /* Argument 1, if needed */
int32 arg2 /* Argument 2, if needed */
)
{
struct spi_csreg *csrptr; /* SPI control and status regs */
return OK;
}

36
device/spi/spiinit.c
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#include <xinu.h>
int32 spiinit (
struct dentry *devptr
)
{
struct spi_csreg *spiptr; /* SPI control and status regs */
struct clock_csreg *cptr;
//kprintf("INIT SPI!\n");
/* Enable SPI clock */
cptr = (struct clock_csreg *)CLOCK_BASE;
cptr->apb2enr |= (1 << SPI1EN);
/* Configure SPI peripheral */
if(devptr->dvminor == 0) {
spiptr = (struct spi_csreg *)SPI1_BASE;
}
else {
kprintf("SPI device not recognized\n");
return SYSERR;
}
spiptr->cr1 &= ~(1 << SPI_ENABLE); // temporarily disable device
spiptr->cr1 |= (1 << SPI_MSTR) | (1 << SPI_SSM) | (1 << SPI_SSI) |
(1 << SPI_BIDIMODE) | (1 << SPI_BIDIOE);
/* Set Baud rate */
spiptr->cr1 |= BR_FPCLKDIV8;
/* Enable SPI peripheral */
spiptr->cr1 |= (1 << SPI_ENABLE);
return OK;
}

21
device/spi/spiputc.c
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#include <xinu.h>
int32 spiputc (struct dentry *devptr, char c)
{
struct spi_csreg *spiptr; /* SPI control and status regs */
/* Configure SPI peripheral */
if(devptr->dvminor == 0) {
spiptr = (struct spi_csreg *)SPI1_BASE;
}
else {
kprintf("SPI device not recognized\n");
return SYSERR;
}
/* Check if buffer is empty -- busy wait TODO: interrupts */
while (spiptr->sr & ~(1 << SPI_TXE));
spiptr->dr = c;
return OK;
}

82
include/clk.h
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/* Xinu for STM32
*
* Original license applies
* Modifications for STM32 by Robin Krens
* Please see LICENSE and AUTHORS
*
* $LOG$
* 2019/11/11 - ROBIN KRENS
* Initial version
*
* $DESCRIPTION$
*
* */
#define CLOCK_BASE 0x40021000;
/* Enable and check clock */
#define PLL_ENABLE 24
#define PLL2_ENABLE 26
#define PLL3_ENABLE 28
#define HSE_ENABLE 16
#define HSI_ENABLE 1
#define HSE_READY 17
/* System clock switch */
#define HSI_SYSTEMCLOCK 0
#define HSE_SYSTEMCLOCK 1
#define PLL_SYSTEMCLOCK 2
#define SWITCH_READY 3
/* PLL setting */
#define PPLx4 0x00080000
#define PPLx5 0x000C0000
#define PPLx6 0x00100000
#define PPLx7 0x00140000
#define PPLx8 0x00180000
#define PPLx9 0x001C0000
#define HSE_PLL_SOURCE 16
#define HSE_DIVIDERPLL 17
/* Enable Clock Signals APB2 */
#define IOPAEN 2
#define IOPBEN 3
#define IOPCEN 4
#define IOPDEN 5
#define IOPEEN 6
#define IOPFEN 7
#define IOPGEN 8
#define ADC1EN 9
#define ADC2EN 10
#define TIM1EN 11
#define SPI1EN 12
#define TIM8EN 13
#define USART1EN 14
/* Enable Clock Signals APB1 */
#define TIM2EN 0
#define TIM3EN 1
#define TIM4EN 2
#define TIM5EN 3
#define TIM6EN 4
//int clockinit(struct dentry * devptr);
//int clockcontrol(struct dentry * devptr, int32_t func, int32_t, int32_t);
struct clock_csreg {
volatile uint32 cr;
volatile uint32 cfgr;
volatile uint32 cir;
volatile uint32 apb2rstr;
volatile uint32 apb1rstr;
volatile uint32 ahbenr;
volatile uint32 apb2enr;
volatile uint32 apb1enr;
volatile uint32 bdcr;
volatile uint32 csr;
volatile uint32 ahbstr;
volatile uint32 cfgr2;
};

40
lib/userland.c.orig
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#include <xinu.h>
__attribute__((naked))
uint32 xinu_syscall(int nr, uint32 arg1, uint32 arg2, uint32 arg3)
{
asm volatile("push {r0-r11}");
asm volatile("push {lr}");
asm volatile("svc 1"); /* Hack: For all service call use 1, arg1 got number */
asm volatile("pop {lr}");
asm volatile("pop {r0-r11}");
asm volatile("bx lr");
}
//void xinu_open(did32 descrp, char * name, char * mode) {
//
// xinu_syscall(XINU_OPEN, descrp, name, mode);
//}
int xinu_uptime() {
return xinu_syscall(XINU_UPTIME, 0, 0, 0);
}
int xinu_putc(int dev, char c) {
return xinu_syscall(XINU_PUTC, dev, c, 0 );
//return xinu_syscall(XINU_PUTC, dev, c, 0);
}
//int xinu_close(dev);
//int xinu_putc(dev);
//
//int xinu_yield();
//int xinu_receive();
//
//int xinu_gettime();
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