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82 lines
1.6 KiB
82 lines
1.6 KiB
/* Xinu for STM32 |
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* |
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* Original license applies |
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* Modifications for STM32 by Robin Krens |
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* Please see LICENSE and AUTHORS |
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* |
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* $LOG$ |
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* 2019/11/11 - ROBIN KRENS |
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* Initial version |
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* |
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* $DESCRIPTION$ |
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* |
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* */ |
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#define CLOCK_BASE 0x40021000; |
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/* Enable and check clock */ |
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#define PLL_ENABLE 24 |
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#define PLL2_ENABLE 26 |
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#define PLL3_ENABLE 28 |
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#define HSE_ENABLE 16 |
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#define HSI_ENABLE 1 |
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#define HSE_READY 17 |
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/* System clock switch */ |
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#define HSI_SYSTEMCLOCK 0 |
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#define HSE_SYSTEMCLOCK 1 |
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#define PLL_SYSTEMCLOCK 2 |
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#define SWITCH_READY 3 |
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/* PLL setting */ |
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#define PPLx4 0x00080000 |
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#define PPLx5 0x000C0000 |
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#define PPLx6 0x00100000 |
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#define PPLx7 0x00140000 |
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#define PPLx8 0x00180000 |
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#define PPLx9 0x001C0000 |
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#define HSE_PLL_SOURCE 16 |
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#define HSE_DIVIDERPLL 17 |
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/* Enable Clock Signals APB2 */ |
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#define IOPAEN 2 |
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#define IOPBEN 3 |
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#define IOPCEN 4 |
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#define IOPDEN 5 |
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#define IOPEEN 6 |
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#define IOPFEN 7 |
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#define IOPGEN 8 |
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#define ADC1EN 9 |
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#define ADC2EN 10 |
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#define TIM1EN 11 |
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#define SPI1EN 12 |
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#define TIM8EN 13 |
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#define USART1EN 14 |
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/* Enable Clock Signals APB1 */ |
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#define TIM2EN 0 |
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#define TIM3EN 1 |
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#define TIM4EN 2 |
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#define TIM5EN 3 |
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#define TIM6EN 4 |
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//int clockinit(struct dentry * devptr); |
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//int clockcontrol(struct dentry * devptr, int32_t func, int32_t, int32_t); |
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struct clock_csreg { |
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volatile uint32 cr; |
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volatile uint32 cfgr; |
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volatile uint32 cir; |
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volatile uint32 apb2rstr; |
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volatile uint32 apb1rstr; |
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volatile uint32 ahbenr; |
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volatile uint32 apb2enr; |
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volatile uint32 apb1enr; |
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volatile uint32 bdcr; |
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volatile uint32 csr; |
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volatile uint32 ahbstr; |
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volatile uint32 cfgr2; |
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}; |
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