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39 lines
1.0 KiB
39 lines
1.0 KiB
/* STM32 Timer |
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General purpose timer */ |
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// RAFA extern uint32 clktime; /* current time in secs since boot */ |
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extern unsigned long clktime; /* current time in secs since boot */ |
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// RAFA extern uint32 count1000; /* ms since last clock tick */ |
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extern unsigned long count1000; /* ms since last clock tick */ |
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extern qid16 sleepq; /* queue for sleeping processes */ |
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extern int32 slnonempty; /* nonzero if sleepq is nonempty */ |
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extern int32 *sltop; /* ptr to key in first item on sleepq */ |
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extern uint32 preempt; /* preemption counter */ |
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#define TIM2_BASE 0x40000000 |
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#define TIM2_IRQ 44 |
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#define TIM_CEN 0 |
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#define TIM_UDIS 1 |
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#define TIM_URS 2 |
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#define TIM_UDE 8 |
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#define TIM_UIE 7 /* */ |
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#define TIM_UIF 0 /* Update interrupt flag*/ |
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struct timer_csreg { |
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volatile uint32 cr1; |
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volatile uint32 cr2; |
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volatile uint32 smcr; |
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volatile uint32 dier; |
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volatile uint32 sr; |
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volatile uint32 egr; |
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volatile uint32 ccmr1; |
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volatile uint32 ccmr2; |
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volatile uint32 ccer; |
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volatile uint32 cnt; |
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volatile uint32 psc; |
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volatile uint32 arr; |
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};
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