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154 lines
4.4 KiB
154 lines
4.4 KiB
/* gpio.h - definintions for the gpio device */ |
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/* |
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* Control and Status Register (CSR) definintions for the GPIO. |
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* The code maps the structure structure directly onto the base address |
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* CSR address for the device. |
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*/ |
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/* Number of GPIO devices in the hardware */ |
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#define NGPIO 4 |
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/* REGISTER BASE */ |
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#define GPIO1_BASE (struct gpio_csreg *)0x40011400 |
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#define GPIO2_BASE (struct gpio_csreg *)0x40011000 |
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#define GPIO3_BASE (struct gpio_csreg *)0x40010C00 |
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#define GPIO4_BASE (struct gpio_csreg *)0x40010800 |
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#define SETCFG 0 |
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#define SETMODE 1 |
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#define INPUT_MODE 0x0 |
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#define OUTPUT_10MHZ 0x1 |
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#define OUTPUT_2MHZ 0x2 |
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#define OUTPUT_50MHZ 0x3 |
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#define MODE_ANALOG 0x0 |
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#define MODE_FLOATING 0x1 |
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#define MODE_INPUT 0x2 |
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#define MODE_GENERAL_PUSHPULL 0x0 |
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#define MODE_GENERAL_OPENDRAIN 0x1 |
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#define MODE_ALT_PUSHPULL 0x2 |
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#define MODE_ALT_OPENDRAIN 0x3 |
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#define PIN0 0 |
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#define PIN1 1 |
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#define PIN2 2 |
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#define PIN3 3 |
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#define PIN4 4 |
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#define PIN5 5 |
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#define PIN6 6 |
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#define PIN7 7 |
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#define PIN8 8 |
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#define PIN9 9 |
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#define PIN10 10 |
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#define PIN11 11 |
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#define PIN12 12 |
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#define PIN13 13 |
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#define PIN14 14 |
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#define PIN15 15 |
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#define PIN16 16 |
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//int gpiowrite(struct dentry * devptr, void * value, uint32_t pinmask); |
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//int gpioinit(struct dentry * devptr); |
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//int gpiocontrol(struct dentry * devptr, uint32_t, uint32_t, uint32_t); |
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struct gpio_csreg { |
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volatile uint32 crl; |
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volatile uint32 crh; |
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volatile uint32 idr; |
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volatile uint32 odr; |
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volatile uint32 bsrr; |
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volatile uint32 brr; |
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volatile uint32 lckr; |
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}; |
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typedef void (*gpiointhook)(uint32, uint32); |
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struct gpiocblk { /* GPIO control block */ |
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gpiointhook gphookfn; /* Interrupt hook function */ |
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}; |
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extern struct gpiocblk gpiotab[]; |
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/* Pin Masks */ |
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// #define PIN_MASK(pin) (1<<pin) |
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// #define GPIO_PIN_ALL 0xFFFFFFFF |
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// #define GPIO_PIN_00 0x00000001 |
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// #define GPIO_PIN_01 0x00000002 |
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// #define GPIO_PIN_02 0x00000004 |
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// #define GPIO_PIN_03 0x00000008 |
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// #define GPIO_PIN_04 0x00000010 |
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// #define GPIO_PIN_05 0x00000020 |
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// #define GPIO_PIN_06 0x00000040 |
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// #define GPIO_PIN_07 0x00000080 |
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// #define GPIO_PIN_08 0x00000100 |
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// #define GPIO_PIN_09 0x00000200 |
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// #define GPIO_PIN_10 0x00000400 |
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// #define GPIO_PIN_11 0x00000800 |
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// #define GPIO_PIN_12 0x00001000 |
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// #define GPIO_PIN_13 0x00002000 |
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// #define GPIO_PIN_14 0x00004000 |
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// #define GPIO_PIN_15 0x00008000 |
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// #define GPIO_PIN_16 0x00010000 |
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// #define GPIO_PIN_17 0x00020000 |
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// #define GPIO_PIN_18 0x00040000 |
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// #define GPIO_PIN_19 0x00080000 |
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// #define GPIO_PIN_20 0x00100000 |
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// #define GPIO_PIN_21 0x00200000 |
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// #define GPIO_PIN_22 0x00400000 |
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// #define GPIO_PIN_23 0x00800000 |
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// #define GPIO_PIN_24 0x01000000 |
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// #define GPIO_PIN_25 0x02000000 |
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// #define GPIO_PIN_26 0x04000000 |
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// #define GPIO_PIN_27 0x08000000 |
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// #define GPIO_PIN_28 0x10000000 |
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// #define GPIO_PIN_29 0x20000000 |
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// #define GPIO_PIN_30 0x40000000 |
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// #define GPIO_PIN_31 0x80000000 |
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// |
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// /* Pin values */ |
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// #define GPIO_VALUE_LOW 0x00 |
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// #define GPIO_VALUE_HIGH 0x01 |
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// |
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// /* Control features */ |
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// #define GPIO_OUTPUT_DISABLE 0x00 |
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// #define GPIO_OUTPUT_ENABLE 0x01 |
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// #define GPIO_REG_INT_HANDLER 0x02 |
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// #define GPIO_INTERRUPT_CTL 0x03 |
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// #define GPIO_DEB_SET_TIME 0x04 |
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// #define GPIO_READ_PIN 0x05 |
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// #define GPIO_WRITE_PIN 0x06 |
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// |
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// |
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// /* Control Flags */ |
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// #define GPIO_INT_LINE0_EN 0x01 |
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// #define GPIO_INT_LINE1_EN 0x02 |
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// #define GPIO_INT_RISE_TRIG 0x04 |
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// #define GPIO_INT_FALL_TRIG 0x08 |
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// #define GPIO_INT_LVL0_TRIG 0x10 |
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// #define GPIO_INT_LVL1_TRIG 0x20 |
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// #define GPIO_INT_ALL_LINES (GPIO_INT_LINE0_EN|GPIO_INT_LINE1_EN) |
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// #define GPIO_INT_ALL_TRIG (GPIO_INT_RISE_TRIG|GPIO_INT_FALL_TRIG|GPIO_INT_LVL0_TRIG|GPIO_INT_LVL1_TRIG) |
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// |
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// |
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// |
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// /* Interrupt vector assignments */ |
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// |
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// #define GPIO0_INT_A 96 |
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// #define GPIO0_INT_B 97 |
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// #define GPIO1_INT_A 98 |
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// #define GPIO1_INT_B 99 |
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// #define GPIO2_INT_A 32 |
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// #define GPIO2_INT_B 33 |
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// #define GPIO3_INT_A 62 |
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// #define GPIO3_INT_B 63 |
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// |
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// /* PRCM Register addresses used for debounce clock */ |
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// |
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// #define PRCM_FCLK_GPIO1 (uint32 *)0x44E000AC |
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// #define PRCM_FCLK_GPIO2 (uint32 *)0x44E000B0 |
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// #define PRCM_FCLK_GPIO3 (uint32 *)0x44E000B4 |
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// #define PRCM_FCLK_BIT (0x1<<18)
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