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263 lines
11 KiB
263 lines
11 KiB
/** |
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* @file flash.h |
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* This file provides various definitions and prototypes for the flash |
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* driver and all its affiliates |
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* |
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* $Id: flash.h 2065 2009-09-04 21:44:36Z brylow $ |
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*/ |
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/* Embedded XINU, Copyright (C) 2007. All rights reserved. */ |
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#ifndef _FLASH_H_ |
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#define _FLASH_H_ |
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/* Disk variables */ |
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#define MAX_LIVE_BLOCKS 8 /**< number of blocks to keep in memory */ |
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#define FLASH_BLK_SIZE 512 /**< disk blocks are 512 bytes */ |
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#define FLASH_BLOCK_FREE 0 /**< block can be allocated */ |
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#define FLASH_BLOCK_CLEAN 1 /**< block has been read but not writted */ |
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#define FLASH_BLOCK_DIRTY 2 /**< block has been changed */ |
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/* Important disk block sections */ |
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#define CFE_MIN_BLOCK 0x0000 /**< Physical addr: 0x000000 */ |
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#define CFE_MAX_BLOCK 0x01FF /**< Physical addr: 0x03ffff */ |
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#define KERNEL_MIN_BLOCK 0x0200 /**< Physical addr: 0x040000 */ |
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#define KERNEL_MAX_BLOCK 0x03FF /**< Physical addr: 0x07ffff */ |
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#define NVRAM_MIN_BLOCK 0x1FC0 /**< Physical addr: 0x3F8000 */ |
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#define NVRAM_MAX_BLOCK 0x1FFF /**< Physical addr: 0x3fffff */ |
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/* Flash control switch values */ |
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#define FLASH_BLOCK_SIZE 0x0000 /**< get the size of disk blocks */ |
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#define FLASH_N_BLOCKS 0x0001 /**< get number of disk blocks */ |
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#define FLASH_SYNC 0x0002 /**< force sync of disk device */ |
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/* Flash variables */ |
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#define FLASH_WIDEMODE 1 |
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#define MAX_REGIONS 8 |
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/* TRX variables */ |
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#define TRX_MAGIC 0x30524448 |
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/* Structures */ |
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struct trx_header |
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{ |
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uint32 magic; /**< "HDR0" */ |
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uint32 len; /**< Length of file including header */ |
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uint32 crc; /**< 32-bit CRC from flag_vers to EOF */ |
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uint32 flags_vers; /**< 0-15 flags, 16-31 version */ |
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uint32 offsets[3]; /**< Partition offsets from header start */ |
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}; |
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/* File structure */ |
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struct file |
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{ |
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uint32 len; |
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char *name; |
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void *data; |
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}; |
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struct flash_region |
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{ |
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uint32 nblocks; /**< number of blocks within region */ |
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uint32 block_size; /**< size of block in region */ |
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uint32 region_start; /**< beginning of region in memory */ |
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uint32 region_size; /**< size of region in bytes */ |
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}; |
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struct flash_block |
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{ |
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uint32 start_pos; /**< physical position data starts at */ |
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uint32 size; /**< size of this block */ |
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byte state; /**< state of this block */ |
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void *buffer; /**< buffer for this block */ |
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}; |
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struct flash |
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{ |
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struct dentry *device; /**< flash entry in dev structure */ |
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byte commands; /**< command set the interface uses */ |
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uint32 base; /**< base address for flash memory */ |
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sid32 lock; /**< lock for execution flash operations */ |
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uint32 size; /**< size (in bytes) of flash memory */ |
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byte mode; /**< current mode of flash */ |
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uint16 nregions; /**< number of regions on device */ |
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struct flash_region regions[MAX_REGIONS]; /**< region info. */ |
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uint32 log_size; /**< size of logical disk blocks */ |
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uint32 nlog_blocks; /**< number of logical blocks on disk */ |
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/** list of open blocks on flash device */ |
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struct flash_block erase_blocks[MAX_LIVE_BLOCKS]; |
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byte curr_block; /**< offset of the oldest block stored */ |
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}; |
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extern struct flash_block bad_block; |
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/* |
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* Common Flash Interface Query commands and macros |
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*/ |
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/* put/get 8-bits commands for CFI */ |
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#define CFI_PUT_8(addr,offset,cmd) \ |
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*((volatile unsigned char *)((addr)+((offset)<<FLASH_WIDEMODE)))=(cmd) |
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#define CFI_GET_8(addr,offset) \ |
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*((volatile unsigned char *)((addr)+((offset)<<FLASH_WIDEMODE))) |
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/* commands for data gathering */ |
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#define CFI_QUERY_ADDR 0x55 |
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#define CFI_QUERY_MODE 0x98 |
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#define CFI_QUERY_EXIT 0xFF |
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#define CFI_MANUFACTURER 0x00 |
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#define CFI_DEVICE 0x01 |
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#define CFI_SIGNATURE 0x10 |
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#define CFI_QUERY_STRING 0x10 |
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#define CFI_COMMAND_SET 0x13 |
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#define CFI_DEV_SIZE 0x27 |
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#define CFI_DEV_INTERFACE 0x28 |
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#define CFI_MAX_BUFFER 0x2A |
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#define CFI_REGION_COUNT 0x2C |
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#define CFI_REGION_TAB 0x2D |
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/* Known command sets (from CFI publication 100) */ |
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#define FLASH_INTEL_ECS 0x0001 |
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#define FLASH_AMD_SCS 0x0002 |
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#define FLASH_INTEL_SCS 0x0003 |
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#define FLASH_AMD_ECS 0x0004 |
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#define FLASH_MTSU_SCS 0x0100 |
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#define FLASH_MTSU_ECS 0x0101 |
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/* |
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* Intel Flash specifc commands and macros |
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*/ |
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/* put/get 8-bits commands for Intel */ |
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#define INTEL_PUT_8(addr,byte) \ |
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*((volatile unsigned char *)((unsigned int)(addr)))=(byte) |
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#define INTEL_GET_8(addr) \ |
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*((volatile unsigned char *)((unsigned int)(addr))) |
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/* put/get 8-bits commands for AMD */ |
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#define AMD_PUT_8(addr,byte) \ |
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*((volatile unsigned char *)((unsigned int)(addr)))=(byte) |
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#define AMD_GET_8(addr) \ |
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*((volatile unsigned char *)((unsigned int)(addr))) |
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/* put/get 16-bits commands for Intel */ |
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#define INTEL_PUT_16(addr,word) \ |
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*((volatile unsigned int16 *)((unsigned int)(addr)))=(word) |
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#define INTEL_GET_16(addr) \ |
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*((volatile unsigned int16 *)((unsigned int)(addr))) |
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/* put/get 16-bits commands for AMD */ |
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#define AMD_PUT_16(addr,word) \ |
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*((volatile unsigned int16 *)((unsigned int)(addr)))=(word) |
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#define AMD_GET_16(addr) \ |
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*((volatile unsigned int16 *)((unsigned int)(addr))) |
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/* Intel command codes */ |
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#define INTEL_READ 0xFF /**< read array (normal read ops) */ |
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#define INTEL_PROGRAM 0x40 /**< prepare to write to flash */ |
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#define INTEL_ERASE 0x20 /**< prepare to erase a block */ |
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#define INTEL_CONFIRM 0xD0 /**< confirm erase command */ |
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#define INTEL_RESUME 0xD0 /**< write/erase resume (post-suspend) */ |
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#define INTEL_UNLOCK 0xD0 /**< soft-unlock a block */ |
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#define INTEL_SUSPEND 0xB0 /**< program/erase suspend */ |
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#define INTEL_READ_SR 0x70 /**< read status register */ |
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#define INTEL_CLR_SR 0x50 /**< clear status register */ |
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#define INTEL_READ_ID 0x90 /**< read identifier */ |
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#define INTEL_BLOCKMOD 0x60 /**< prepare block for lock operation */ |
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#define INTEL_LOCK 0x01 /**< soft-lock a block */ |
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#define INTEL_LOCKDOWN 0x2F /**< put a hardware lock on a block */ |
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/* AMD Command Codes */ |
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#define AMD_UNLOCK_CYCLE1 0xAA /**< write to 0x555 */ |
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#define AMD_UNLOCK_CYCLE2 0x55 /**< write to 0x2AA */ |
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#define AMD_ERASE_CYCLE3 0x80 /**< write to 0x555 */ |
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#define AMD_ERASE_CYCLE6 0x30 /**< write to erase address */ |
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#define AMD_PROGRAM_CYCLE3 0xA0 /**< write to 0x555 */ |
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#define AMD_RESET 0xF0 /**< write to 0xXXX */ |
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#define AMD_READ 0xFF /**< read command */ |
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#define AMD_BLOCKMOD 0x60 /**< prepare block for lock op */ |
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#define AMD_LOCK 0x01 /**< soft-lock a block */ |
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#define AMD_CLR_SR 0x50 /**< clear status register */ |
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/* AMD */ |
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#define AMD_REG_CYCLE1 0x555 /**< Register for unlock cycle1 */ |
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#define AMD_REG_CYCLE2 0x2AA /**< Register for unlock cycle2 */ |
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#define AMD_SR_WSMS 0x001 /**< Write State Machine Status */ |
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/* Intel status register offsets */ |
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#define INTEL_SR_WSMS 7 /**< Write State Machine Status */ |
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#define INTEL_SR_ESS 6 /**< Erase-Suspend Status */ |
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#define INTEL_SR_ES 5 /**< Erase Status */ |
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#define INTEL_SR_PS 4 /**< Program Status */ |
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#define INTEL_SR_PSS 2 /**< Program Suspend Status */ |
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#define INTEL_SR_BLS 1 /**< Block Lock Status */ |
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/* Intel identifier register offsets */ |
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#define INTEL_ID_MFG 0x00 /**< Intel = 0x0089 */ |
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#define INTEL_ID_DEV 0x02 /**< Device memory-map */ |
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#define INTEL_ID_BLS 0x04 /**< bit: 0 = soft-lock, 1 = hard-lock */ |
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/* Intel block lock constants */ |
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#define INTEL_S_LOCK 0x01 /**< software lock */ |
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#define INTEL_H_LOCK 0x02 /**< lock-down (hardward lock) */ |
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/* AMD block lock constants */ |
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#define AMD_S_LOCK 0x01 /**< software lock */ |
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#define AMD_H_LOCK 0x02 /**< lock-down (hardward lock) */ |
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/* flashControl constants */ |
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#define FLASH_BLOCK 0x00 /**< block is a flash_block struct */ |
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#define FLASH_LOGBLOCK 0x01 /**< block is a logical block number */ |
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/* physicalLock commands */ |
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#define FLASH_STATUS 0x0000 /**< return status register (8-bits) */ |
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#define FLASH_MODE 0x0001 /**< change mode device is in */ |
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#define FLASH_LOCKED 0x0010 /**< return id register (16-bits) */ |
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#define FLASH_LOCK 0x0011 /**< put a software lock on a block */ |
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#define FLASH_UNLOCK 0x0012 /**< remove a software lock on a block */ |
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#define FLASH_LOCKDOWN 0x0013 /**< put hardware lock on a block */ |
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#define FLASH_ERASE_PREP 0x0014 /**< prepare hardware to be erased */ |
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#define FLASH_RESET 0x0015 |
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extern struct flash flashtab[]; |
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/* Prototypes for flash function calls */ |
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devcall flashInit(struct dentry *); |
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devcall flashOpen(struct dentry *, va_list); |
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devcall flashRead(struct dentry *, byte *, uint32); |
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devcall flashWrite(struct dentry *, byte *, uint32); |
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devcall flashSeek(struct dentry *, uint32); |
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devcall flashControl(struct dentry *, uint16, int32, int32); |
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devcall flashClose(struct dentry *); |
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/* Prototypes for the Logical Flash Interface */ |
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devcall logicalRead(struct flash *, byte *, uint32); |
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devcall logicalWrite(struct flash *, byte *, uint32); |
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struct flash_block logicalMap(struct flash *, uint32); |
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/* Prototypes for Physical Flash functions */ |
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devcall physicalRead(struct flash *, struct flash_block *); |
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devcall physicalWrite(struct flash *, struct flash_block *); |
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devcall physicalErase(struct flash *, struct flash_block *); |
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devcall physicalControl(struct flash *, struct flash_block *, byte, |
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uint32); |
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devcall physicalIntelRead(struct flash *, struct flash_block *); |
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devcall physicalIntelWrite(struct flash *, struct flash_block *); |
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devcall physicalIntelErase(struct flash *, struct flash_block *); |
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devcall physicalIntelControl(struct flash *, struct flash_block *, byte, |
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uint32); |
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devcall physicalAMDRead(struct flash *, struct flash_block *); |
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/* Prototypes for changing OS in flash memory */ |
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bool validateTrx(struct file *); |
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/* File function prototypes */ |
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syscall printFileStats(struct file *, char *, char *, int, int); |
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syscall freeFile(struct file *); |
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#endif /* _FLASH_H_ */
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