From 76c04211bb31b58ae6b7e8ee6b34b94a28d3b6b0 Mon Sep 17 00:00:00 2001 From: Rafael Zurita Date: Sat, 25 Jul 2020 23:00:36 -0300 Subject: [PATCH] ciao stm --- device/tty/ttyhandle_in.c | 25 +--------- device/tty/ttyhandle_out.c | 19 ++------ device/tty/ttyhandler.c | 96 +------------------------------------- include/clock.h | 53 +++++++++++++++++++++ include/cortexm3.h | 27 ----------- include/timer.h | 38 ++------------- include/xinu.h | 3 +- system/clkinit.c | 7 +-- 8 files changed, 65 insertions(+), 203 deletions(-) create mode 100755 include/clock.h delete mode 100644 include/cortexm3.h diff --git a/device/tty/ttyhandle_in.c b/device/tty/ttyhandle_in.c index 01c31dd..ddce7e7 100644 --- a/device/tty/ttyhandle_in.c +++ b/device/tty/ttyhandle_in.c @@ -10,10 +10,6 @@ local void eputc(char, struct ttycblk *, struct uart_csreg *); * ttyhandle_in - Handle one arriving char (interrupts disabled) *------------------------------------------------------------------------ */ -// void ttyhandle_in ( -// struct ttycblk *typtr, /* Pointer to ttytab entry */ -// struct uart_csreg *csrptr /* Address of UART's CSR */ -// ) void ttyhandle_in ( struct ttycblk *typtr, /* Pointer to ttytab entry */ struct uart_csreg *csrptr, /* Address of UART's CSR */ @@ -62,17 +58,6 @@ void ttyhandle_in ( /* If flow control is in effect, handle ^S and ^Q */ -// STM32 specific: if (typtr->tyoflow) { -// STM32 specific: if (ch == typtr->tyostart) { /* ^Q starts output */ - // STM32 specific: typtr->tyoheld = FALSE; -// STM32 specific: ttykickout(csrptr); -// STM32 specific: return; -// STM32 specific: } else if (ch == typtr->tyostop) { /* ^S stops output */ -// STM32 specific: typtr->tyoheld = TRUE; -// STM32 specific: return; -// STM32 specific: } -// STM32 specific: } - typtr->tyoheld = FALSE; /* Any other char starts output */ if (typtr->tyimode == TY_IMCBREAK) { /* Just cbreak mode */ @@ -268,16 +253,8 @@ local void eputc( struct uart_csreg *csrptr /* Address of UART's CSRs */ ) { - // *typtr->tyetail++ = ch; - - // RAFA + /* very avr specific */ serial_put_char(ch); - /* Wrap around buffer, if needed */ - - // if (typtr->tyetail >= &typtr->tyebuff[TY_EBUFLEN]) { -// typtr->tyetail = typtr->tyebuff; -// } - // ttykickout(csrptr); return; } diff --git a/device/tty/ttyhandle_out.c b/device/tty/ttyhandle_out.c index 6866f0d..493d3b7 100644 --- a/device/tty/ttyhandle_out.c +++ b/device/tty/ttyhandle_out.c @@ -18,8 +18,6 @@ void ttyhandle_out( int32 avail; /* Available chars in output buf*/ int32 uspace; /* Space left in onboard UART */ /* output FIFO */ - //uint32 ier = 0; - /* If output is currently held, simply ignore the call */ if (typtr->tyoheld) { @@ -31,16 +29,11 @@ void ttyhandle_out( if ( (typtr->tyehead == typtr->tyetail) && (semcount(typtr->tyosem) >= TY_OBUFLEN) ) { - // STM32 specific: csrptr->cr1 &= ~(1 << UART_INTR_TX); /* deshabilita interrupciones */ - //ier = csrptr->ier; - //csrptr->ier = ier & ~UART_IER_ETBEI; return; } /* Initialize uspace to the available space in the Tx FIFO */ - //uspace = UART_FIFO_SIZE - csrptr->txfifo_lvl; - /* avr specific: just one byte of fifo so far */ uspace = UART_FIFO_SIZE; @@ -48,8 +41,7 @@ void ttyhandle_out( /* nonempty, xmit chars from the echo queue */ while ( (uspace>0) && typtr->tyehead != typtr->tyetail) { - // STM32 specific: csrptr->dr = *typtr->tyehead++; /* ENVIA CARACERES POR UART */ - serial_put_char(*typtr->tyohead++); /* ENVIA CARACERES POR UART */ + serial_put_char(*typtr->tyohead++); /* send chars using uart */ if (typtr->tyehead >= &typtr->tyebuff[TY_EBUFLEN]) { typtr->tyehead = typtr->tyebuff; } @@ -62,10 +54,7 @@ void ttyhandle_out( ochars = 0; avail = TY_OBUFLEN - semcount(typtr->tyosem); while ( (uspace>0) && (avail > 0) ) { - //while(!(csrptr->sr & UART_TC)); - //while(csrptr->sr &= ~(1 << UART_TEST)); - // STM32 specific: csrptr->dr = *typtr->tyohead++; /* ENVIA CARACERES POR UART */ - serial_put_char(*typtr->tyohead++); /* ENVIA CARACERES POR UART */ + serial_put_char(*typtr->tyohead++); /* send chars using uart */ if (typtr->tyohead >= &typtr->tyobuff[TY_OBUFLEN]) { typtr->tyohead = typtr->tyobuff; } @@ -79,9 +68,7 @@ void ttyhandle_out( if ( (typtr->tyehead == typtr->tyetail) && (semcount(typtr->tyosem) >= TY_OBUFLEN) ) { - // STM32 specific: csrptr->cr1 &= ~(1 << UART_INTR_TX); /* deshabilita interrupcines de transmición */ - //ier = csrptr->ier; - //csrptr->ier = (ier & ~UART_IER_ETBEI); + /* deshabilitar interrupcines de transmición */ } return; } diff --git a/device/tty/ttyhandler.c b/device/tty/ttyhandler.c index e59585d..de3ce01 100644 --- a/device/tty/ttyhandler.c +++ b/device/tty/ttyhandler.c @@ -7,18 +7,13 @@ *------------------------------------------------------------------------ */ void ttyhandler(uint32 xnum, char c, int flag) { - // struct dentry *devptr; /* Address of device control blk*/ const __flash struct dentry *devptr; /* Address of device control blk*/ struct ttycblk *typtr; /* Pointer to ttytab entry */ struct uart_csreg *csrptr; /* Address of UART's CSR */ -// uint32 iir = 0; /* Interrupt identification */ -// uint32 lsr = 0; /* Line status */ -// -// + /* Get CSR address of the device (assume console for now) */ devptr = (struct dentry *) &devtab[CONSOLE]; - // STM32 specific: csrptr = (struct uart_csreg *) devptr->dvcsr; /* Obtain a pointer to the tty control block */ @@ -26,98 +21,11 @@ void ttyhandler(uint32 xnum, char c, int flag) { /* Test type of UART interrupt */ - // STM32 specific: uint8 flags = csrptr->sr & 0xFF; - //kprintf("%x", flags); - // STM32 specific: if (flags & UART_RXNE) { - // STM32 specific: ttyhandle_in(typtr, csrptr); - // STM32 specific: return; - // STM32 specific: } - - // STM32 specific: else if (flags & UART_TC) { - // STM32 specific: ttyhandle_out(typtr, csrptr); - // STM32 specific: return; - - // STM32 specific: } - - /* AVR */ + if (flag) /* TX */ ttyhandle_out(typtr, csrptr); else /* RX */ ttyhandle_in(typtr, csrptr, c); - -// switch(flags) { -// -// case UART_TC_TXE: -// case UART_TC: -// ttyhandle_out(typtr, csrptr); -// return; -// case UART_RXNE: -// ttyhandle_in(typtr, csrptr); -// return; -// -// default: -// kprintf("Unknown status\n"); -// return; -// } - -// /* Decode hardware interrupt request from UART device */ -// -// /* Check interrupt identification register */ -// iir = csrptr->iir; -// if (iir & UART_IIR_IRQ) { -// return; -// } -// -// /* Decode the interrupt cause based upon the value extracted */ -// /* from the UART interrupt identification register. Clear */ -// /* the interrupt source and perform the appropriate handling */ -// /* to coordinate with the upper half of the driver */ -// -// /* Decode the interrupt cause */ -// -// iir &= UART_IIR_IDMASK; /* Mask off the interrupt ID */ -// switch (iir) { -// -// /* Receiver line status interrupt (error) */ -// -// case UART_IIR_RLSI: -// lsr = csrptr->lsr; -// if(lsr & UART_LSR_BI) { /* Break Interrupt */ -// -// /* Read the RHR register to acknowledge */ -// -// lsr = csrptr->buffer; -// } -// return; -// -// /* Receiver data available or timed out */ -// -// case UART_IIR_RDA: -// case UART_IIR_RTO: -// -// resched_cntl(DEFER_START); -// -// /* While chars avail. in UART buffer, call ttyhandle_in */ -// -// while ( (csrptr->lsr & UART_LSR_DR) != 0) { -// ttyhandle_in(typtr, csrptr); -// } -// -// resched_cntl(DEFER_STOP); -// -// return; -// -// /* Transmitter output FIFO is empty (i.e., ready for more) */ -// -// case UART_IIR_THRE: -// ttyhandle_out(typtr, csrptr); -// return; -// -// /* Modem status change (simply ignore) */ -// -// case UART_IIR_MSC: -// return; -// } } diff --git a/include/clock.h b/include/clock.h new file mode 100755 index 0000000..9034b24 --- /dev/null +++ b/include/clock.h @@ -0,0 +1,53 @@ +/* clock.h */ + +extern uint32 clktime; /* current time in secs since boot */ +extern uint32 count1000; /* ms since last clock tick */ + +extern qid16 sleepq; /* queue for sleeping processes */ +extern int32 slnonempty; /* nonzero if sleepq is nonempty */ +extern int32 *sltop; /* ptr to key in first item on sleepq */ +extern uint32 preempt; /* preemption counter */ + +struct am335x_timer1ms { + uint32 tidr; /* Identification register */ + uint32 res1[3]; /* Reserved */ + uint32 tiocp_cfg; /* OCP Interface register */ + uint32 tistat; /* Status register */ + uint32 tisr; /* Interrupt status register */ + uint32 tier; /* Interrupt enable register */ + uint32 twer; /* Wakeup enable register */ + uint32 tclr; /* Optional features */ + uint32 tcrr; /* Internal counter value */ + uint32 tldr; /* Timer load value */ + uint32 ttgr; /* Trigger register */ + uint32 twps; /* Write posting register */ + uint32 tmar; /* Match register */ + uint32 tcar1; /* Capture register 1 */ + uint32 tsicr; /* Synchronous interface control*/ + uint32 tcar2; /* Capture register 2 */ + uint32 tpir; /* Positive increment register */ + uint32 tnir; /* Negative increment register */ + uint32 tcvr; /* 1ms control register */ + uint32 tocr; /* Overflow mask register */ + uint32 towr; /* no. of overflows */ +}; + +#define AM335X_TIMER1MS_ADDR 0x44E31000 +#define AM335X_TIMER1MS_IRQ 67 + +#define AM335X_TIMER1MS_TIOCP_CFG_SOFTRESET 0x00000002 +#define AM335X_TIMER1MS_TISTAT_RESETDONE 0x00000001 + +#define AM335X_TIMER1MS_TISR_MAT_IT_FLAG 0x00000001 +#define AM335X_TIMER1MS_TISR_OVF_IT_FLAG 0x00000002 +#define AM335X_TIMER1MS_TISR_TCAR_IT_FLAG 0x00000004 + +#define AM335X_TIMER1MS_TIER_MAT_IT_ENA 0x00000001 +#define AM335X_TIMER1MS_TIER_OVF_IT_ENA 0x00000002 +#define AM335X_TIMER1MS_TIER_TCAR_IT_ENA 0x00000004 + +#define AM335X_TIMER1MS_TCLR_ST 0x00000001 +#define AM335X_TIMER1MS_TCLR_AR 0x00000002 + +#define AM335X_TIMER1MS_CLKCTRL_ADDR 0x44E004C4 +#define AM335X_TIMER1MS_CLKCTRL_EN 0x00000002 diff --git a/include/cortexm3.h b/include/cortexm3.h deleted file mode 100644 index 9cd7098..0000000 --- a/include/cortexm3.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Xinu for STM32 - * - * Original license applies - * Modifications for STM32 by Robin Krens - * Please see LICENSE and AUTHORS - * - * $LOG$ - * 2019/11/11 - ROBIN KRENS - * Initial version - * - * $DESCRIPTION$ - * - * */ - -/* Nested interrupt vector */ -#define NVIC_ISER0 (uint32 *) 0xE000E100 -#define NVIC_ISER1 (uint32 *) 0xE000E104 -#define NVIC_STIR (uint32 *) 0xE000EF00 - -/* System control block */ -#define SCB_ICSR (uint32 *) 0xE000ED04 -#define PENDSV_INTR 28 - -// #define MAXADDR 0x20010000 /* 64kB SRAM */ -#define MAXADDR 0x20004E20 /* 64kB SRAM */ // RAFA -// #define MAXADDR 0x20004000 /* 64kB SRAM */ // RAFA -#define HANDLERSTACK 1024 /* Size reserved for stack in Handler mode */ diff --git a/include/timer.h b/include/timer.h index a9ed05f..78e93fc 100644 --- a/include/timer.h +++ b/include/timer.h @@ -1,39 +1,9 @@ -/* STM32 Timer -General purpose timer */ +/*General purpose timer */ -// RAFA extern uint32 clktime; /* current time in secs since boot */ -extern unsigned long clktime; /* current time in secs since boot */ -// RAFA extern uint32 count1000; /* ms since last clock tick */ -extern unsigned long count1000; /* ms since last clock tick */ +extern unsigned long clktime; /* current time in secs since boot */ +extern unsigned long count1000; /* ms since last clock tick */ extern qid16 sleepq; /* queue for sleeping processes */ extern int32 slnonempty; /* nonzero if sleepq is nonempty */ extern int32 *sltop; /* ptr to key in first item on sleepq */ -extern uint32 preempt; /* preemption counter */ - -#define TIM2_BASE 0x40000000 -#define TIM2_IRQ 44 - -#define TIM_CEN 0 -#define TIM_UDIS 1 -#define TIM_URS 2 - -#define TIM_UDE 8 -#define TIM_UIE 7 /* */ - -#define TIM_UIF 0 /* Update interrupt flag*/ - -struct timer_csreg { - volatile uint32 cr1; - volatile uint32 cr2; - volatile uint32 smcr; - volatile uint32 dier; - volatile uint32 sr; - volatile uint32 egr; - volatile uint32 ccmr1; - volatile uint32 ccmr2; - volatile uint32 ccer; - volatile uint32 cnt; - volatile uint32 psc; - volatile uint32 arr; -}; +extern uint32 preempt; /* preemption counter */ diff --git a/include/xinu.h b/include/xinu.h index 656dc49..bfa8e66 100644 --- a/include/xinu.h +++ b/include/xinu.h @@ -13,8 +13,7 @@ #include #include #include -#include /* avr Clock system */ -#include /* avr Timer peripheral */ +#include #include /* avr UART peripheral */ #include #include /* avr GPIO peripherals */ diff --git a/system/clkinit.c b/system/clkinit.c index 8862ad3..1192c3e 100644 --- a/system/clkinit.c +++ b/system/clkinit.c @@ -8,10 +8,8 @@ #include uint32 clktime; /* Seconds since boot */ -// RAFA uint32 count1000; /* ms since last clock tick */ -unsigned long count1000; /* ms since last clock tick */ +unsigned long count1000; /* ms since last clock tick */ qid16 sleepq; /* Queue of sleeping processes */ -// RAFA uint32 preempt; /* Preemption counter */ unsigned long preempt; /* Preemption counter */ /*------------------------------------------------------------------------ @@ -22,9 +20,6 @@ void clkinit(void) { struct clock_csreg * clockptr; - struct timer_csreg * tptr; - clockptr = (struct clock_csreg *)CLOCK_BASE; - tptr = (struct timer_csreg *)TIM2_BASE; sleepq = newqueue(); /* Allocate a queue to hold the delta */ /* list of sleeping processes */